? semiconductor components industries, llc, 2006 august, 2006 ? rev. 4 1 publication order number: NTMS4700N/d NTMS4700N power mosfet 30 v, 14.5 a, single n ? channel, so ? 8 features ? ultra low r ds(on) (at 4.5 v gs ), low gate resistance and low q g ? optimized for high side control applications ? high speed switching capability ? pb ? free package is available applications ? notebook computer vcore applications ? network applications ? dc ? dc converters maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit drain ? to ? source voltage v dss 30 v gate ? to ? source voltage ? continuous v gs 20 v continuous drain current (note 1) steady state t a = 25 c i d 11.5 a t a = 70 c 9.2 t 10 s t a = 25 c 14.5 power dissipation (note 1) steady state t a = 25 c p d 1.56 w t 10 s 2.5 continuous drain current (note 2) steady state t a = 25 c i d 8.6 a t a = 70 c 6.8 power dissipation (note 2) t a = 25 c p d 0.86 w pulsed drain current tp = 10 s i dm 40 a operating and storage temperature t j , t stg ? 55 to 150 c source current (body diode) i s 2.5 a single pulse drain ? to ? source avalanche energy (v dd = 25 v, v gs = 10 v, i pk = 7.5 a, l = 10 mh, r g = 25 ) e as 280 mj lead temperature for soldering purposes (1/8 in from case for 10 s) t l 260 c thermal resistance ratings rating symbol value unit junction ? to ? lead ? steady state r jl 16 c/w junction ? to ? ambient ? steady state (note 1) r ja 80 junction ? to ? ambient ? t 10 s (note 1) r ja 50 junction ? to ? ambient ? steady state (note 2) r ja 145 maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. surface ? mounted on fr4 board using 1 in sq. pad size (cu area 1.127 in sq. [1 oz] including traces). 2. surface ? mounted on fr4 board using minimum recommended pad size (cu area 0.412 in sq.). device package shipping ordering information NTMS4700Nr2 so ? 8 2500/tape & reel so ? 8 (pb ? free) 2500/tape & reel marking diagram / pin assignment 4700n = specific device code a = assembly location y = year ww = work week = pb ? free package http://onsemi.com NTMS4700Nr2g ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. g d s 30 v 7.3 m @ 4.5 v 6.0 m @ 10 v r ds(on) typ 14.5 a i d max v (br)dss so ? 8 case 751 style 12 1 8 4700n ayww 18 drain drain drain drain source source source gate top view (note: microdot may be in either location)
NTMS4700N http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol test condition min typ max unit off characteristics drain ? to ? source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 30 v drain ? to ? source breakdown voltage temperature coefficient v (br)dss /t j 18 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 24 v t j = 25 c 1.0 a t j = 125 c 50 gate ? to ? source leakage current i gss v ds = 0 v, v gs = 20 v 100 na on characteristics (note 3) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.0 3.0 v negative threshold temperature coefficient v gs(th) /t j 5.0 mv/ c drain ? to ? source on resistance r ds(on) v gs = 4.5 v, i d = 10 a 7.3 10 m v gs = 10 v, i d = 13 a 6.0 7.2 forward transconductance g fs v ds = 15 v, i d = 10 a 25 s charges, capacitances and gate resistance input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 24 v 1600 pf output capacitance c oss 700 reverse transfer capacitance c rss 200 total gate charge q g(tot) v gs = 4.5 v, v ds = 15 v, i d = 10 a 16 24 nc threshold gate charge q g(th) 3.0 gate ? to ? source charge q gs 5.0 gate ? to ? drain charge q gd 7.0 gate resistance r g 1.4 switching characteristics (note 4) turn ? on delay time t d(on) v gs = 10 v, v dd = 15 v, i d = 1.0 a, r g = 3.0 10 ns rise time t r 5.0 turn ? off delay time t d(off) 29.5 fall time t f 28.5 drain ? source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 10 a t j = 25 c 0.75 1.0 v t j = 125 c 0.55 reverse recovery time t rr v gs = 0 v, di s /dt = 100 a/ s, i s = 10 a 40 ns charge time t a 18 discharge time t b 22 reverse recovery charge q rr 36 nc 3. pulse test: pulse width 300 s, duty cycle 2%. 4. switching characteristics are independent of operating junction temperatures.
NTMS4700N http://onsemi.com 3 typical performance curves t j = 125 c 0 16 0.6 0.2 v ds , drain ? to ? source voltage (volts) i d, drain current (amps) 12 4 0 figure 1. on ? region characteristics 03 20 12 4 5 0 figure 2. transfer characteristics v gs , gate ? to ? source voltage (volts) 0.002 0.006 0 figure 3. on ? resistance vs. drain current and temperature i d, drain current (amps) r ds(on), drain ? to ? source resistance ( ) i d, drain current (amps) figure 4. on ? resistance vs. drain current and gate voltage ? 50 0 ? 25 25 1 0.5 0 50 150 figure 5. on ? resistance variation with temperature t j , junction temperature ( c) t j = 25 c 0.012 610 t j = ? 55 c t j = 125 c 75 t j = 25 c i d = 13 a v gs = 10 v r ds(on), drain ? to ? source resistance (normalized) 0.4 t j = 25 c r ds(on), drain ? to ? source resistance ( ) 1.5 v gs = 10 v 222 100 25 figure 6. drain ? to ? source leakage current vs. voltage v ds , drain ? to ? source voltage (volts) 15 v gs = 0 v i dss , leakage (na) t j = 150 c t j = 125 c v gs = 4.5 v 1000 10000 1000000 3 v v ds 10 v 0.010 20 2.8 v 8 2.4 v 8 14 18 30 24 20 v gs = 10 v 16 0.008 125 100 0 0.8 10 5 0.5 0.1 0.3 0.7 24 2 0.004 26 v gs = 10 v t j = 25 c t j = ? 55 c 0.002 0.006 0 i d, drain current (amps) 0.012 610 222 0.010 14 18 0.008 0.004 26 2 100000 5 v 4 v 3.4 v 4 1
NTMS4700N http://onsemi.com 4 typical performance curves figure 7. capacitance variation figure 8. gate ? to ? source and drain ? to ? source voltage vs. total charge 2 0 v sd , source ? to ? drain voltage (volts) figure 9. resistive switching time variation vs. gate resistance i s , source current (amps) v gs = 0 v t j = 25 c 12 0 0.4 figure 10. diode forward voltage vs. current 0.8 0.6 8 6 gate ? to ? source or drain ? to ? source voltage (volts) c, capacitance (pf) 500 3000 10 0 5 10 5 t j = 25 c c iss c oss c rss 15 25 0 2000 c iss c rss v ds = 0 v v gs = 0 v v ds v gs v gs , gate?to?source voltage (volts) 0 1 0 q g , total gate charge (nc) 5 3 21016 i d = 10 a t j = 25 c 12 v gs q gs 18 r g , gate resistance (ohms) 1 10 100 100 10 t, time (ns) v dd = 15 v i d = 10 a v gs = 4.5 v t r t d(on) 1000 t f t d(off) q gd qt 1 4 2500 2 4 1.0 0.2 1000 1500 150 80 0 t j , starting junction temperature ( c) eas, single pulse drain ? to ? source avalanche energy (mj) i d = 7.5 a 100 25 figure 11. maximum avalanche energy vs. starting junction temperature 125 75 240 160 50 40 280 200 120 468 14 10 20
NTMS4700N http://onsemi.com 5 package dimensions so ? 8 case 751 ? 07 issue ag style 12: pin 1. source 2. source 3. source 4. gate 5. drain 6. drain 7. drain 8. drain seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 NTMS4700N/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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